Driver circuits for charging a capacitor to a high voltage, e.g., to a voltage substantially equal to the magnitude V.sub.H of the power supply voltage of the circuit, are well known. One of the most common driver circuits of this type uses a bootstrap capacitor connected between the source and gate electrodes of a field effect transistor and is described in some detail in, e.g., U.S. Pat. No. Re. 27,305, original filed Dec. 14, 1966, and commonly assigned U.S. Pat. No. 3,564,290 filed on Mar. 13, 1969, by G. Sonoda. Known field effect transistor circuits which use only a single field effect transistor serially connected to a capacitor, such as disclosed in commonly assigned U.S. Pat. No. 3,387,286, filed on July 14, 1967, by R. H. Dennard, normally charge the capacitor only at an exponential rate. It is also known as stated in IBM Journal of Research and Development, Vol. 24, No. 3, May 1980, pp. 318-319, in an article entitled, "A 64K FET Dynamic Random Access Memory: Design Considerations and Description", by T. C. Lo, R. E. Scheuerlein and R. Tamlyn, that a field effect transistor has an impact-ionization-induced device-sustaining voltage which is the drain-to-source voltage of the field effect transistor above which the drain current increases regeneratively until thermal self-destruction of the transistor occurs. To avoid hot electron operation in a field effect transistor, there is taught in commonly assigned U.S. Pat. No. 4,199,695, filed on Mar. 3, 1978, by P. W. Cook and S. E. Schuster, voltage control means adapted to reduce field effect transistor drain to source voltage by connecting a plurality of field effect transistors in series to reduce the drain to source voltage across each device. There is also taught in Solid-State Electronics, Vol. 24, pp. 523-531, 1981, in an article entitled, "A Model for the Breakdown Characteristics of p-Channel MOS Transistor Protection Devices", the use of large current flow through transistors as protective devices. Field effect transistors having various kinds of geometries for controlling current flow are also known, such as a transistor having source and drain regions of a given width with a gate electrode having a width substantially smaller than the given width, as taught in commonly assigned U.S. Pat. No. 4,024,561, filed on Apr. 1, 1976 by A. K. Ghatalia.